It is the active card in the ADC system. It is in this card that all the four functions of sampling, hold, quantize and code are performed. Each card takes two analog input and gives 6-bit digital output. Its internal module are summarised below:
1.Amplifier Section:
Each ADC card accepts two inputs from the baseband system at 0 db power level. These zero-mean signals are AC coupled to the amplifier circuit using AD9617 op-amps. Configured as a non-inverting amplifier, it has a gain of 1.5 . This value was choosen such that a 6σ signal would occupy the ±1V (2V peak-to-peak ) voltage range of the ADC.The AD9617provides a low offset gain and is compensated internally. This reduces the circuitry needed to ensure a stable operation.
2.Reference Generator Section:
The External Reference Generator Circuitry was designed around the Analog Devices two terminal reference AD589 .The AD589 serves a low cost precision reference to a circuit which uses AD708 dual op-amp with the matched pair transistor LM3904 and LM3906. The transistor drive the reference ladder of the ADC. The loop thus established ensures stable reference voltage in spite of the changes in the ladder impedance from one ADC to another.
3.ADC Chip:
The Analog Devices AD9058, a dual bit 50Hz Flash ADC forms the core of the ADC card. although AD9058 provides a highly stable and precise internal reference to drive its reference ladder, it is configured to be used with an external reference. This is done since the internal reference requires the output to be uni-polar. A bi-polar external reference was used instead to reduce the possibility of introducing DC offsets in the signal.
4.Protection Circuitry:
A Protection Circuitry was needed to restrict the maximum input voltage to the ADC to the rate specified for the AD9058. A simple circuit was devised using PIN Diodes to restrict voltages to within ±1.2V.
5.Digital Section:
This section contains latches (74F574 ) for the ADC output, TTL-to-ECL (MC10124 ) converters for data and ECL-to-TTL (MC10125 ) converter for clock. The clock is converted to TTL level and given to the ADC chip. An inverted version of this clock is given to the latches which receive the digitised data from the ADC. The inversion of the clock provides sufficient time for the ADC output to stabilise at the latch input. The latch output are given to the TTL-to-ECL converters which then transmit the data to the Delay subsystem.
6.Power Supply:
The ADC card requires ±10-12V for both analog and digital sections. These are derived by using on-board voltage regulators which are fed by the linear power supplies. The use of on-board regulators as well as separate power supplies for analog and digital sections reduces the possibility of leakage of correlated power into the analog signal.